Dear ASIC Readers,
We as an ASIC Engineer are frequently using different simulators for our simulation activity. At present time we are frequently using modelsim/Questa and vcs. These are the industry popular and well proven simulators.
I have seen people who are using modelsim / Questa simulator from Mentors but dont really know the exact difference between them.
I have captured some difference between Questa and Modelsim. Though both are simulators from the Mentor Graphics there are some differences between them
Below are the differences I captured :
ModelSim is Mentor Graphics HDL simulator. Questa is Mentor Graphics advanced verification platform that uses ModelSim as its core simulation engine.
Features of the two tools can be grouped into five categories and compared as follows:
1. Language Support
- ModelSim supports SystemVerilog IEEE 1800 for Design only, as well as VHDL (1987, 1993, 2002), Verilog (1995, 2001, 2005), as well as options for mixed language and language neutral licensing and support for SystemC 2.2 IEEE 1666/OSCI 2.2.
- Questa supports all of this as well as SystemVerilog IEEE 1800 for Verification, mixed language licensing (Questa is by default language neutral), PSL IEEE 1850, and SystemC 2.2 IEEE 1666/OSCI 2.2 as standard features.
2. Simulation
- ModelSim supports a single-kernel simulation engine, Verilog RTL & gate level performance optimizations, VHDL RTL & VITAL performance optimizations, performance and memory profiler, separate elaboration, waveform management tool set, VCD and extended VCD support, VCD re-simulation, batch mode simulation, integrated simulation, checkpoint & restore,
- Questa’s simulation support is identical to ModelSim’s
3. Design Entry, Debug, and Analysis
- ModelSim supports an HDL editor, integrated project manager, source code templates and wizards, interactive and post-simulation debug, dataflow graphical and textual causality traceback, source annotation, memory window, extra standalone viewer, multiple waveform windows, waveform compare, C Debugger and transaction viewing for SystemC.
- Questa supports all of this and the C debugger and transaction viewing for SystemC and SystemVerilog are standard parts of the product.
4. Advanced Verification Methods
- ModelSim does not support any advanced verification features.
- Questa supports assertion-based verification (including a library of pre-written assertions called Questa Verification Library or QVL, and an assertion thread debugger), automated test stimulus generation via a constraint solver engine, and PowerAware RTL verification supporting both CPF and UPF formats.
5 Verification Management and Coverage
- ModelSim supports Code Coverage (it is included in ModelSim SE, and an option to other versions of ModelSim).
-Questa supports code coverage along with functional coverage, a unified coverage database (UCDB), coverage viewing, test ranking, and test plan tracking
Hope you find this information useful.
Enjoy reading...!
ASIC With Ankit
We as an ASIC Engineer are frequently using different simulators for our simulation activity. At present time we are frequently using modelsim/Questa and vcs. These are the industry popular and well proven simulators.
I have seen people who are using modelsim / Questa simulator from Mentors but dont really know the exact difference between them.
I have captured some difference between Questa and Modelsim. Though both are simulators from the Mentor Graphics there are some differences between them
Below are the differences I captured :
ModelSim is Mentor Graphics HDL simulator. Questa is Mentor Graphics advanced verification platform that uses ModelSim as its core simulation engine.
Features of the two tools can be grouped into five categories and compared as follows:
1. Language Support
- ModelSim supports SystemVerilog IEEE 1800 for Design only, as well as VHDL (1987, 1993, 2002), Verilog (1995, 2001, 2005), as well as options for mixed language and language neutral licensing and support for SystemC 2.2 IEEE 1666/OSCI 2.2.
- Questa supports all of this as well as SystemVerilog IEEE 1800 for Verification, mixed language licensing (Questa is by default language neutral), PSL IEEE 1850, and SystemC 2.2 IEEE 1666/OSCI 2.2 as standard features.
2. Simulation
- ModelSim supports a single-kernel simulation engine, Verilog RTL & gate level performance optimizations, VHDL RTL & VITAL performance optimizations, performance and memory profiler, separate elaboration, waveform management tool set, VCD and extended VCD support, VCD re-simulation, batch mode simulation, integrated simulation, checkpoint & restore,
- Questa’s simulation support is identical to ModelSim’s
3. Design Entry, Debug, and Analysis
- ModelSim supports an HDL editor, integrated project manager, source code templates and wizards, interactive and post-simulation debug, dataflow graphical and textual causality traceback, source annotation, memory window, extra standalone viewer, multiple waveform windows, waveform compare, C Debugger and transaction viewing for SystemC.
- Questa supports all of this and the C debugger and transaction viewing for SystemC and SystemVerilog are standard parts of the product.
4. Advanced Verification Methods
- ModelSim does not support any advanced verification features.
- Questa supports assertion-based verification (including a library of pre-written assertions called Questa Verification Library or QVL, and an assertion thread debugger), automated test stimulus generation via a constraint solver engine, and PowerAware RTL verification supporting both CPF and UPF formats.
5 Verification Management and Coverage
- ModelSim supports Code Coverage (it is included in ModelSim SE, and an option to other versions of ModelSim).
-Questa supports code coverage along with functional coverage, a unified coverage database (UCDB), coverage viewing, test ranking, and test plan tracking
Hope you find this information useful.
Enjoy reading...!
ASIC With Ankit
5 comments:
Hey Thanks Anand !
Thanks for reading and for your comment !
Regards,
Ankit
hi ankit,
could you please tell whether ModelSim – PE (version 10.2b) support SV verification?
hello ankit what are the possible interview that the interviwer may ask if i mention that i used questasim ?
Hi Bhagat,
Well, its difficult to answer your question as what interviewer is going to ask is only the interviewer will know :)
But mostly, when you say you have worked with questasim, they would expect at least basic things and hands on experience on tool usage like setup, basic commands to run simulation, database to load, debug option. Well if you have worked on particular tool and has hands on experience you should be able to answer the common and most useful commands as a verification engineer is what mostly interviewer would look for.
Thanks,
Ankit
good post, there is no good comparison even from Mentor's site.
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